"A clever person solves a problem. A wise person avoids it." Albert Einstein

Services > Digital Design, DSP, and FPGA

We can support you in analysis of requirements, component selection, schematics design, digital algorithm development, HW and control SW integration, on-board debugging.

The complex embedded system could consists of several digital components such as CPUs, FPGAs, DSPs, AD- and DA- converters, custom-specific circuits, etc.

The components have to be selected according to the specified requirements.

Image 6

We have experience with the following devices:

  • CPU: ARM, Atmel, Infineon, FreeScale, NIOS soft core
  • FPGA: Altera, Xilinx
  • DSP: Analog Devices

We have used a wide range of peripherals in our projects: SD RAM, DDR II and DDRIII, SD card, Flash Memory, EEPROM, FRAM, ADC, DAC, LCD touch panel, etc.

Also, we have experience with a wide range of interfaces: USB, Ethernet, E1, CAN, GPIB, RS232, RS485, RS530, SPI, I2S, I2C, LVDS, Bluetooth, PCI, Wi-Fi, and so one.

For debugging and functionality tests of some devices we can use the JTAG interface (connected via appropriate hardware debugger/adapter).

FPGA and DSP Design

The FPGA and DSP usage overlaps; both can be used for HW control and/or for signal processing. The corresponding task distribution between FPGA and DSP is the part of the analysis and simulation for which we use tools such as MatLab, MathCad, LabVIEW, and SciLab.

In recent projects we have used the following types of algorithms: FIR, IIR, CIC, Cordic, Interpolator, Decimator, Bit Stuffer, Scrambler, Reed-Solomon, different peripheral controls (serial ports, general IO, memory interfaces), NCO, FFT, spectrum analysis, pattern recognition, noise computation, PID regulator, modulation/demodulation, etc.

These algorithms have been used in different segments – measurement instruments, wireless communication, air traffic communication, audio applications, and so one.

Image 6

For FPGA/DSP we are using the following design tools :

  • Analog Devices Visual DSP (C, Asm, debugging)
  • Altera SOPC Builder (NIOS II soft-core)
  • Altera Quartus II, Xilinx Plan Ahead (Schematic, VHDL, IP’s, timing analysis, synthesis, simulation, debugging)


Copyright © 2022 Consilia Brno s.r.o., Legal Information about this website.